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rado3105
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power comparison of PPC CPU and MIPSBE CPU?

Wed Jul 16, 2014 11:14 pm

What is more powerfull PPC or MIPSBE CPU with same frequencies?
 
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docmarius
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Re: power comparison of PPC CPU and MIPSBE CPU?

Thu Jul 17, 2014 12:04 am

Both are 32 bit RISC superscalar architectures, same number of registers (32), MMU.
MIPS has out of order execution, supports floating point SIMD instructions, and uses a dedicated branch register and can do 2 operations/cycle. MIPSBE has fixed endianness.
PPC can do endianness switching on the fly, has a paged memory architecture, and comes in multicore packages and with hardware encryption support in current mikrotik products.

So I would say that at the same clock speed, except encryption, a single core MIPS is slightly faster than a single core PPC.
Since PPCs used by MT are dual core, those are of course more performant (and of course IF the code is optimized for multicore applications).

But for MT products, PPC are dual core and clock rates are higher than those of MIPSBE based products, so they will surpass all of the MIPSBE devices.
Last edited by docmarius on Thu Jul 17, 2014 12:13 am, edited 2 times in total.
 
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Re: power comparison of PPC CPU and MIPSBE CPU?

Thu Jul 17, 2014 12:12 am

rb850Gx2 has only 500mhz CPU...so in one thread application will be slower than rb2011?
 
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docmarius
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Re: power comparison of PPC CPU and MIPSBE CPU?

Thu Jul 17, 2014 12:22 am

If you think about the fact that most RISC processors are similar evolved at the time, the number of instructions per clock cycle is somehow on par.
(They would not be able to sell a less powerful processor with almost the same price, since that price is almost linear with the chip surface).

So really, I would not expect some spectacular differences between the two architectures.
Usually, on embedded devices, the co-embedded peripherals make the difference, in this case e.g. hardware encryption support.
Also the speed of RAM is a big showstopper (not the case @500MHz) because it limits the amount of data that can be manipulated per time unit.

So IMHO on single thread code they should be on par.

But think of the fact that the 850 will be dual core. So even if there is a single thread for an action, it can have the whole core to itself while householding OS tasks can be offloaded to the other core, which is not possible for a single core device.

Compared to the current devices, the 850 will probably be able to achieve 50% of the RB1100AHx2 performance (which is PPC clocked at 1066MHz). And this is almost double in regard to the 2011 performances.

It is also interesting to know if the 850 will have a switch chip or direct connected ports, since the PPC allows for 5 Gb ports, which will increase the potential throughput in routing applications by eliminating the bottleneck between the CPU and the switch chip, but at the same time limiting the throughput if switching is needed (probably there's no win/win here, unless there is switching support in the chip or fastpath can do miracles on a bridge).

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