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tomaskir
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850Gx2 block diagram

Mon Dec 01, 2014 1:35 pm

Could the board block diagram please be posted to routerboard.com for 850Gx2?
While we are at it, can the performance tables also be added? I know they are posted here in the forum, but please add them?

What Im interested in: is ether1-ether5 on a single switch-chip or is ether1 direct-to-cpu?
If its all a single switch-chip, then the board is limited to 1GB full duplex of L3 capability... I would think the CPU can handle more...
 
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janisk
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Re: 850Gx2 block diagram

Tue Dec 02, 2014 9:46 am

What Im interested in: is ether1-ether5 on a single switch-chip or is ether1 direct-to-cpu?
If its all a single switch-chip, then the board is limited to 1GB full duplex of L3 capability... I would think the CPU can handle more...
yes.


Long answer: ether1 is connected to CPU and ether1 is part of the switch. So you can have the cake and eat it too by plugging Gbit WAN in ether1 and have another Gbit shared across ether2-ether5
 
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tomaskir
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Re: 850Gx2 block diagram

Wed Dec 03, 2014 4:50 pm

But if I plug a GBit into ether1 and ether5, and want to run routing between them, I will only get 1GBit full duplex throughput, not 2GB full duplex, because realistically, there is only a single 1GBit link to the CPU, right?

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