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IPANetEngineer
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CRS 3xx - L3 ASIC performance testing

Mon Oct 12, 2020 8:40 pm

Did some work on testing the L3 performance last week in 7.1beta2 and published it today.

https://stubarea51.net/2020/10/12/mikro ... e-testing/

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Dude2048
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Re: CRS 3xx - L3 ASIC performance testing

Mon Oct 12, 2020 8:49 pm

Thanx, higher than I expected. Nicely done.
 
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Re: CRS 3xx - L3 ASIC performance testing

Tue Oct 13, 2020 10:11 am

Regarding small MTU tests (tests #1 and #2), I suppose that the bottleneck is on the packet generator or receiver side, not the CRS317. As you see, PPS (packets per second) value is almost the same in all three cases, and the transfer speed depends purely on packet size. That is a typical case for CPU, where each packet causes an interrupt, which, in turn, adds performance overhead. ASIC doesn't care much about the packet count.
 
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Re: CRS 3xx - L3 ASIC performance testing

Tue Oct 13, 2020 3:18 pm

Thanks for the feedback...i'll check the hypervisor and see if it's creating a bottleneck somewhere.
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MrYan
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Re: CRS 3xx - L3 ASIC performance testing

Tue Oct 13, 2020 11:14 pm

That is a typical case for CPU, where each packet causes an interrupt, which, in turn, adds performance overhead. ASIC doesn't care much about the packet count.
This. In fact you did well to get 1 Mpps from a Linux box (Proxmox/KVM) without any tuning. CloudFlare had to put a lot of effort into tuning to get that number - https://blog.cloudflare.com/how-to-rece ... n-packets/
 
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Re: CRS 3xx - L3 ASIC performance testing

Sun Oct 18, 2020 12:05 am

Regarding small MTU tests (tests #1 and #2), I suppose that the bottleneck is on the packet generator or receiver side, not the CRS317. As you see, PPS (packets per second) value is almost the same in all three cases, and the transfer speed depends purely on packet size. That is a typical case for CPU, where each packet causes an interrupt, which, in turn, adds performance overhead. ASIC doesn't care much about the packet count.
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