Feature request: Allow `preferred-architecture=arm64` for wAP ax, SXTsq 5 ax

RouterOS
1

In short, allow installing ARM64 packages on wAP ax, SXTsq 5 ax. So that, the device might evolve from great to even greater. Thanks ))

2

There is no "allow ARM64 packages on any device". The device has to have an ARM64 CPU and the hAP ax doesn't.

The L009 device where this change was made actually has an ARM64 CPU but was first released with ARM32 software, for what ever reason. That is why it could later be changed.

3

wAP ax has 64bit CPU but has little memory, so it makes no sense in arm64 OS.

4

A little clarification, more available registers are reducing both memory access and overall instructions cycles

5

This advantage cannot outweigh the increase in memory usage. Instructions are larger (no more Thumb-2). Every data structure that uses pointers consume more RAM, data alignment also needs more padding. And even with the increased number of available registers, there a still registers that need to be preserved across calls, and those push/pop operations now write/read twice as much each time, and of course the stack needs to be larger.

As a result, fewer stuffs fit in the CPU cache, which in turn increases memory access! And with increased RAM usage, you can track fewer connections for example.

RouterOS normally does not make extensive use of 64-bit maths, and the device does not have enough RAM to exceed the limit of 32-bit pointers. Switching to 64-bit will certainly make it slower for the tasks that it's doing. On such device with small amount of RAM, the only current advantage of switching to ARM64 is that you can use some features like HTTP/2 support. The "Apps" stuff is not relevant for that amount of available RAM.

6

The L009 as a IPQ-5018 chip, the wAP ax and other simple ax devices have a IPQ-5010.

7

If I am not mistaken, the IPQ-5010 chip is ARM Cortex-A53, which means it fully supports ARM64:

Cortex-A53 Product Support

Characteristics

  • The Armv8-A architecture provides 64-bit data processing, extended virtual addressing, and a 64-bit general purpose registers.
  • The first Armv8-A processor aimed at providing power-efficient 64-bit processing.
  • In-order, 8-stage, dual-issue pipeline
  • Improved integer, Neon, Floating-Point Unit (FPU), and memory performance.
  • The Cortex-A53 can be implemented in two execution states: AArch32 and AArch64. The AArch64 state allows execution of 64-bit applications. The AArch32 state allows execution of existing Armv7-A applications.