Looking at the PCB pictures, it seems like the FastEthernet ports are connected to a switch chip, and the GigabitEthernet ports directly to the CPU.
Could you please outline the topology a bit more?
Are those GigabitEthernet ports connected to dedicated CPU interfaces or an CPU internal switch?
How are the FastEthernet ports or the switch connected to the CPU?
How will the SFP be connected?
Price range of RB2011 product line is very attractive to me.
I especially waiting for SFP+USB port version. it will work at local market.
question is RB2011 processor power enough for src-NAT 1Gbps service?
i tested rb450G,rb1200,rb1100ah,rb1100ahx2 for sorNAT performance with my laptop.(only WAN + 1 LAN client with src NAT)
when it direc connect with WAN, download speed reach 982mbps MAX,
with RB450G it can reach 340mbps with around 90% cpu load
with RB1200 it can reach 530mbps with around 80% cpu load
with RB1100ah it can reach 670mbps with around 80% cpu load
with RB1100ahx2 it can reach 710mbps with around 60% cpu load
5160 dual core xeon with intel dualport server nic x86 machine can reach 980mbps with 10~15% cpu load.
i tested with ros v5.11 last month.
how good perfomance can i expecte to rb2011 product line for srcNAT?
If it can handle over 600mbps WAN to LAN srcNAT throughput with less then 50% cpu load, i’m pretty much sure this product line will work at our local market.
RB2011L series is “low cost” model with no features (L = Low cost).
We will also have RB2011U series with full features (serial port, voltage monitor, etc)
RB2011 is a low cost device (below 100$). I can’t imagine how anyone can make 10G ports on a 100$ device. For this type of ports, you should be hoping for the CCR series: http://routerboard.com/CCR1036-12G-4S
Currently it will have 1G ports, but we will see about 10G in future models.
you assumption is wrong, SFP and Gigabit ports (total of 6 ports) are all connected through switch chip. 100Mbit ports are connected directly to CPU. This is because of CPU design.
Thank you for your answer, a few questions remain however.
Ok so we have 6 Gigabit Ports on a switch chip with an 1G Uplink to a CPU/SoC interface?
The 100Mbit/s ports are real interfaces of the CPU or also grouped over an CPU/SoC internal switch?