Curious about this new beast.
Asked Normunds at the MUM about the switch chips and block diagram and he told me it hasn’t anything to do with the RB2011, suggesting me to ask here.
A block diagram, RAM size and switch chips used plus any other hardware details would be welcome, as RB2011 is already one of the most deployed devices given its flexibility and price/performance ratio.
+1
More info on rb3011. Block diagram, input voltage, etc…
what power unit it use?
what PoE standart it use on port_10 ?
is there any possibility to have 2 minipci-e slot, for dual band router?
Unfortunately only option for dual band is USB radio 
RB3011 will not be dual band. There is also no ability to make it dual band, since it only has one slot for wireless
This is not possible. Usb radio is not supported in V6
What a pitty, sometimes it can be handy. Anyway it looks like hAP ac is actually the only possible way to get dual band ac - I haven’t seen simultaneous dualband ac cards.
Can we get block diagram of 3011? It is 2q of 2015 now 
I asked Janis about the internals at the MUM, here is a few clarifications:
2 switch chips, each 5x 1GBit ports.
Each switch chip connected to CPU with a 2GBit link.
1x MiniPCI-E for wireless cards.
CPU brand/type unknown.
And what about hardware aes support?
Since CPU brand/type is currently unknown, if it supports aes hw acceleration is also unknown.
Oh wow, that would be a big upgrade over everything with a switch chip that they used before. Even the CCR1009 has a 1Gbit link internally to the 4x1Gbps connected through the switch chip.
Are you sure he said 2Gbps per switch chip link, or maybe he meant 1Gbps to each switch chip so 2Gbps in total, but not shared.
I asked specifically if each switch chip has a 2Gbps full-duplex link to the CPU.
To that the answer was yes.
I would not take it as a “this will be 100% in the production hardware” quote, rather as a “from my memory, this is what is in it” quote.
He did not look at any specs or anything else, I just caught him at the table with these questions.
Unknown for us but well known for them
its likely one of “off the shelf” inexpensive A9 twin-core SoC.
which explain relatively small performance (for twin-core 1.2Ghz chip).
a12/a17 do about 42% more performance than A9 (on same clock on similar die)
and a53 and a57 do about 2.5x and 4x times (in peak not sustaine/stressed)more performance than A9 chips, respectively.
interestingly thats newer chips not really much bigger(in transistors)and consume not really more(especiallycompared to performance boost)power than aged A9 chips.
just hope its not (extremely buggy. both in hardware/sdk)Broadcom chips. best case scenario - qualcomm krait chips 
in-between - new Marvel chips and recent Mediatek ARM chips.
anyway, FPU/VFPv4 and SIMDNEON portions did neat tricks against math in any ARM chips(up to 32 64b registers and FMA feats for half-precision in some chips. if properly supported by firmware/software, of course.
p.s.
even in absence of FPU(which isn’t usual for recent generations even entry-level chips)- ARM devices had Much better FPU emulation(than MIPS32/MIPS64 chips had, yet), so combined with bigger clocks, twin cores, bigger caches - its ought to be worthy rb2011 replacement for home.
for serious traffic with encryption, twin core chips was too slow anyway, with or without “acceleration”(which btw did trick only around most heavy “hot spots” in cipher/crypto code, rest was doen by firmware anyway/always, regardless vendor/model)so for companies CCR1009-PC or CCR1016 variants would be better start.
i personally wonder why its rated “2x faster than rb-2011”, cuz 2x more clocks, 2x more cores… and with proper use of VFPv4 and NEON number may be closer to 6x-7x in some workloads and about 3.5x in ordinary configurations.
You should not look to generic ARM SoCs being in these devices.
These need networking-related SoCs, which are quite different from generic-use ARM SoCs.
My guess would be its running on a Cavium chip…
there isn’t “networking” SoC. excpt packed underperforming/bottlenecked ultra-cheap stuff in-one, like freescale and broadcom did.
in fact, some SMB and SOHO vendors use notebooks and desktop chips pretty well(including x86, but uncommon. excpt in SDN-all-in one boxes for DC), but major shift(due price, termal package and simplicity of heat dissipation)was around smartphone chips. note: built-in switched sks, both in terms of security, performance and management and abuse whole concept of such devices(unless that was “smart switch” class). routing matter, switching doesn’t.
as you opinion about Cavium chips in such producs - the only ARM(ARMv8)-based chips was ThunderX family with seriously multi-core and many-core chips with 8-16 and 24-48-cores, respectively.
and for A57 cores “2x performance of RB2011” is joke. they can eat rb2011 alive even at 500Clock with single-thread/core.
Thunder X along like previous MIPS64-based chips, they ship before - used in serious 1U, 2U enclosures and with ATX/SSI power. pretty expensive, pretty big, pretty fast.
no, its NOT ThunderX.
personally i would like something like low-end Krait chips without “offloading” nonsense/marketing and horrific(worser was only Broadcom, probably)SDK, we’re may see in Cavium stuff.
or Marvel SoC. or inexpensive and fast MediaTek chips.
p.s. formerly-devoted to Cavium vendors - turned to other options, as we’re can see. and they had numer of good reasons for. in general MIPS64/MIPS32 installbase was quickly shrink aswell as arch development/advance does already, its just about time.
This is the CPU that we will use for RB3011:
http://www.anandtech.com/show/7526/qualcomm-atheros-announces-new-internet-processor-lineup-ipq8064-and-ipq8062
Can you as well confirm that both switch-chips have a full-duplex 2Gbps link to the CPU?
And if the HW acceleration support for AES is going to be supported?
Thanks Normunds!